Modelica.Electrical.Analog.Semiconductors

Information

This package contains semiconductor devices:

• diode
• MOS transistors
• bipolar transistors
• thyristor
• triac

Most of the semiconductor devices contain a conditional heat port, which is not active by default. If it is active the loss power is calculated to be used in a thermal net. The heating variants of the semiconductor devices are provided to use the thermal port temperature in the electric calculation. That means that for a true thermal electric interaction the heating device models have to be used.

Package Content

Name	Description
Diode	Simple diode
ZDiode	Zener diode with 3 working areas
PMOS	Simple MOS Transistor
NMOS	Simple MOS Transistor
NPN	Simple BJT according to Ebers-Moll
PNP	Simple BJT according to Ebers-Moll
HeatingDiode	Simple diode with heating port
HeatingNMOS	Simple MOS Transistor with heating port
HeatingPMOS	Simple PMOS Transistor with heating port
HeatingNPN	Simple NPN BJT according to Ebers-Moll with heating port
HeatingPNP	Simple PNP BJT according to Ebers-Moll with heating port
Thyristor	Simple Thyristor Model
SimpleTriac	Simple triac, based on Semiconductors.Thyristor model

Modelica.Electrical.Analog.Semiconductors.Diode

Information

The simple diode is a one port. It consists of the diode itself and an parallel ohmic resistance R. The diode formula is:

                v/vt
  i  =  ids ( e      - 1).

If the exponent v/vt reaches the limit maxex, the diode characteristic is linearly continued to avoid overflow.

Please note: In case of useHeatPort=true the temperature dependence of the electrical behavior is not modelled yet. The parameters are not temperature dependent.

Parameters

Name	Description
Ids	Saturation current [A]
Vt	Voltage equivalent of temperature (kT/qn) [V]
Maxexp	Max. exponent for linear continuation
R	Parallel ohmic resistance [Ohm]
useHeatPort	=true, if HeatPort is enabled
T	Fixed device temperature if useHeatPort = false [K]

Connectors

Name	Description
p	Positive pin (potential p.v > n.v for positive voltage drop v)
n	Negative pin
heatPort

Modelica.Electrical.Analog.Semiconductors.ZDiode

Information

The simple Zener diode is a one port. It consists of the diode itself and an parallel ohmic resistance R. The diode formula is:

                v/Vt                -(v+Bv)/(Nbv*Vt)
  i  =  Ids ( e      - 1) - Ibv ( e                  ).

If the exponent in one of the two branches reaches the limit Maxexp, the diode characteristic is linearly continued to avoid overflow.

The Zener diode model permits (in contrast to the simple diode model) current in reverse direction if the breakdown voltage Bv (also known Zener knee voltage) is exceeded.

The thermal power is calculated by i*v.

Please note: In case of useHeatPort=true the temperature dependence of the electrical behavior is not modelled yet. The parameters are not temperature dependent.

Parameters

Name	Description
Ids	Saturation current [A]
Vt	Voltage equivalent of temperature (kT/qn) [V]
Maxexp	Max. exponent for linear continuation
R	Parallel ohmic resistance [Ohm]
Bv	Breakthrough voltage = Zener- or Z-voltage [V]
Ibv	Breakthrough knee current [A]
Nbv	Breakthrough emission coefficient
useHeatPort	=true, if HeatPort is enabled
T	Fixed device temperature if useHeatPort = false [K]

Connectors

Name	Description
p	Positive pin (potential p.v > n.v for positive voltage drop v)
n	Negative pin
heatPort

Modelica.Electrical.Analog.Semiconductors.PMOS

Information

The PMOS model is a simple model of a p-channel metal-oxide semiconductor FET. It differs slightly from the device used in the SPICE simulator. For more details please care for H. Spiro.

The model does not consider capacitances. A high drain-source resistance RDS is included to avoid numerical difficulties.

Please note: In case of useHeatPort=true the temperature dependence of the electrical behavior is not modelled yet. The parameters are not temperature dependent.

References:

Spiro, H.: Simulation integrierter Schaltungen. R. Oldenbourg Verlag Muenchen Wien 1990.

Some typical parameter sets are:

  W       L      Beta        Vt    K2     K5      DW       DL
  m       m      A/V^2       V     -      -       m        m
  50.e-6  8.e-6  0.0085e-3  -0.15  0.41   0.839  -3.8e-6  -4.0e-6
  20.e-6  6.e-6  0.0105e-3  -1.0   0.41   0.839  -2.5e-6  -2.1e-6
  30.e-6  5.e-6  0.0059e-3  -0.3   0.98   1.01    0       -3.9e-6
  30.e-6  5.e-6  0.0152e-3  -0.69  0.104  1.1    -0.8e-6  -0.4e-6
  30.e-6  5.e-6  0.0163e-3  -0.69  0.104  1.1    -0.8e-6  -0.4e-6
  30.e-6  5.e-6  0.0182e-3  -0.69  0.086  1.06   -0.1e-6  -0.6e-6
  20.e-6  6.e-6  0.0074e-3  -1.    0.4    0.59    0        0

Parameters

Name	Description
W	Width [m]
L	Length [m]
Beta	Transconductance parameter [A/V2]
Vt	Zero bias threshold voltage [V]
K2	Bulk threshold parameter
K5	Reduction of pinch-off region
dW	Narrowing of channel [m]
dL	Shortening of channel [m]
RDS	Drain-Source-Resistance [Ohm]
useHeatPort	=true, if HeatPort is enabled
T	Fixed device temperature if useHeatPort = false [K]

Connectors

Name	Description
D	Drain
G	Gate
S	Source
B	Bulk
heatPort

Modelica.Electrical.Analog.Semiconductors.NMOS

Information

The NMOS model is a simple model of a n-channel metal-oxide semiconductor FET. It differs slightly from the device used in the SPICE simulator. For more details please care for H. Spiro.

The model does not consider capacitances. A high drain-source resistance RDS is included to avoid numerical difficulties.

Please note: In case of useHeatPort=true the temperature dependence of the electrical behavior is not modelled yet. The parameters are not temperature dependent.

  W       L      Beta         Vt      K2     K5       DW       DL
  m       m      A/V^2        V       -      -        m        m
  12.e-6  4.e-6  0.062e-3    -4.5     0.24   0.61    -1.2e-6  -0.9e-6      depletion
  60.e-6  3.e-6  0.048e-3     0.1     0.08   0.68    -1.2e-6  -0.9e-6      enhancement
  12.e-6  4.e-6  0.0625e-3   -0.8     0.21   0.78    -1.2e-6  -0.9e-6      zero
  50.e-6  8.e-6  0.0299e-3    0.24    1.144  0.7311  -5.4e-6  -4.e-6
  20.e-6  6.e-6  0.041e-3     0.8     1.144  0.7311  -2.5e-6  -1.5e-6
  30.e-6  9.e-6  0.025e-3    -4.0     0.861  0.878   -3.4e-6  -1.74e-6
  30.e-6  5.e-6  0.031e-3     0.6     1.5    0.72     0       -3.9e-6
  50.e-6  6.e-6  0.0414e-3   -3.8     0.34   0.8     -1.6e-6  -2.e-6       depletion
  50.e-6  5.e-6  0.03e-3      0.37    0.23   0.86    -1.6e-6  -2.e-6       enhancement
  50.e-6  6.e-6  0.038e-3    -0.9     0.23   0.707   -1.6e-6  -2.e-6       zero
  20.e-6  4.e-6  0.06776e-3   0.5409  0.065  0.71    -0.8e-6  -0.2e-6
  20.e-6  4.e-6  0.06505e-3   0.6209  0.065  0.71    -0.8e-6  -0.2e-6
  20.e-6  4.e-6  0.05365e-3   0.6909  0.03   0.8     -0.3e-6  -0.2e-6
  20.e-6  4.e-6  0.05365e-3   0.4909  0.03   0.8     -0.3e-6  -0.2e-6
  12.e-6  4.e-6  0.023e-3    -4.5     0.29   0.6      0        0           depletion
  60.e-6  3.e-6  0.022e-3     0.1     0.11   0.65     0        0           enhancement
  12.e-6  4.e-6  0.038e-3    -0.8     0.33   0.6      0        0           zero
  20.e-6  6.e-6  0.022e-3     0.8     1      0.66     0        0

References:

Spiro, H.: Simulation integrierter Schaltungen. R. Oldenbourg Verlag Muenchen Wien 1990.

Parameters

Name	Description
W	Width [m]
L	Length [m]
Beta	Transconductance parameter [A/V2]
Vt	Zero bias threshold voltage [V]
K2	Bulk threshold parameter
K5	Reduction of pinch-off region
dW	narrowing of channel [m]
dL	shortening of channel [m]
RDS	Drain-Source-Resistance [Ohm]
useHeatPort	=true, if HeatPort is enabled
T	Fixed device temperature if useHeatPort = false [K]

Connectors

Name	Description
D	Drain
G	Gate
S	Source
B	Bulk
heatPort

Modelica.Electrical.Analog.Semiconductors.NPN

Information

This model is a simple model of a bipolar NPN junction transistor according to Ebers-Moll.

Please note: In case of useHeatPort=true the temperature dependence of the electrical behavior is not modelled yet. The parameters are not temperature dependent.

A typical parameter set is:

  Bf  Br  Is     Vak  Tauf    Taur  Ccs   Cje     Cjc     Phie  Me   PHic   Mc     Gbc    Gbe    Vt
  -   -   A      V    s       s     F     F       F       V     -    V      -      mS     mS     V
  50  0.1 1e-16  0.02 0.12e-9 5e-9  1e-12 0.4e-12 0.5e-12 0.8   0.4  0.8    0.333  1e-15  1e-15  0.02585

References:

Vlach, J.; Singal, K.: Computer methods for circuit analysis and design. Van Nostrand Reinhold, New York 1983 on page 317 ff.

Parameters

Name	Description
Bf	Forward beta
Br	Reverse beta
Is	Transport saturation current [A]
Vak	Early voltage (inverse), 1/Volt [1/V]
Tauf	Ideal forward transit time [s]
Taur	Ideal reverse transit time [s]
Ccs	Collector-substrate(ground) cap. [F]
Cje	Base-emitter zero bias depletion cap. [F]
Cjc	Base-coll. zero bias depletion cap. [F]
Phie	Base-emitter diffusion voltage [V]
Me	Base-emitter gradation exponent
Phic	Base-collector diffusion voltage [V]
Mc	Base-collector gradation exponent
Gbc	Base-collector conductance [S]
Gbe	Base-emitter conductance [S]
Vt	Voltage equivalent of temperature [V]
EMin	if x < EMin, the exp(x) function is linearized
EMax	if x > EMax, the exp(x) function is linearized
IC	Initial Value [V]
UIC
useHeatPort	=true, if HeatPort is enabled
T	Fixed device temperature if useHeatPort = false [K]

Connectors

Name	Description
heatPort
C	Collector
B	Base
E	Emitter

Modelica.Electrical.Analog.Semiconductors.PNP

Information

This model is a simple model of a bipolar PNP junction transistor according to Ebers-Moll.

Please note: In case of useHeatPort=true the temperature dependence of the electrical behavior is not modelled yet. The parameters are not temperature dependent.

A typical parameter set is:

  Bf  Br  Is     Vak  Tauf    Taur  Ccs   Cje     Cjc     Phie  Me   PHic   Mc     Gbc    Gbe    Vt
  -   -   A      V    s       s     F     F       F       V     -    V      -      mS     mS     V
  50  0.1 1e-16  0.02 0.12e-9 5e-9  1e-12 0.4e-12 0.5e-12 0.8   0.4  0.8    0.333  1e-15  1e-15  0.02585

References:

Vlach, J.; Singal, K.: Computer methods for circuit analysis and design. Van Nostrand Reinhold, New York 1983 on page 317 ff.

Parameters

Name	Description
Bf	Forward beta
Br	Reverse beta
Is	Transport saturation current [A]
Vak	Early voltage (inverse), 1/Volt [1/V]
Tauf	Ideal forward transit time [s]
Taur	Ideal reverse transit time [s]
Ccs	Collector-substrate(ground) cap. [F]
Cje	Base-emitter zero bias depletion cap. [F]
Cjc	Base-coll. zero bias depletion cap. [F]
Phie	Base-emitter diffusion voltage [V]
Me	Base-emitter gradation exponent
Phic	Base-collector diffusion voltage [V]
Mc	Base-collector gradation exponent
Gbc	Base-collector conductance [S]
Gbe	Base-emitter conductance [S]
Vt	Voltage equivalent of temperature [V]
EMin	if x < EMin, the exp(x) function is linearized
EMax	if x > EMax, the exp(x) function is linearized
useHeatPort	=true, if HeatPort is enabled
T	Fixed device temperature if useHeatPort = false [K]

Connectors

Name	Description
heatPort
C	Collector
B	Base
E	Emitter

Modelica.Electrical.Analog.Semiconductors.HeatingDiode

Information

The simple diode is an electrical one port, where a heat port is added, which is defined in the Modelica.Thermal library. It consists of the diode itself and an parallel ohmic resistance R. The diode formula is:

                v/vt_t
  i  =  ids ( e        - 1).

  vt_t = k*temp/q

If the exponent v/vt_t reaches the limit maxex, the diode characteristic is linearly continued to avoid overflow.
The thermal power is calculated by i*v.

Parameters

Name	Description
Ids	Saturation current [A]
Maxexp	Max. exponent for linear continuation
R	Parallel ohmic resistance [Ohm]
EG	activation energy
N	Emission coefficient
TNOM	Parameter measurement temperature [K]
XTI	Temperature exponent of saturation current
useHeatPort	=true, if HeatPort is enabled
T	Fixed device temperature if useHeatPort = false [K]

Connectors

Name	Description
p	Positive pin (potential p.v > n.v for positive voltage drop v)
n	Negative pin
heatPort

Modelica.Electrical.Analog.Semiconductors.HeatingNMOS

Information

The NMOS model is a simple model of a n-channel metal-oxide semiconductor FET. It differs slightly from the device used in the SPICE simulator. For more details please care for H. Spiro.
A heating port is added for thermal electric simulation. The heating port is defined in the Modelica.Thermal library.
The model does not consider capacitances. A high drain-source resistance RDS is included to avoid numerical difficulties.

  W       L      Beta         Vt      K2     K5       DW       DL
  m       m      A/V^2        V       -      -        m        m
  12.e-6  4.e-6  0.062e-3    -4.5     0.24   0.61    -1.2e-6  -0.9e-6      depletion
  60.e-6  3.e-6  0.048e-3     0.1     0.08   0.68    -1.2e-6  -0.9e-6      enhancement
  12.e-6  4.e-6  0.0625e-3   -0.8     0.21   0.78    -1.2e-6  -0.9e-6      zero
  50.e-6  8.e-6  0.0299e-3    0.24    1.144  0.7311  -5.4e-6  -4.e-6
  20.e-6  6.e-6  0.041e-3     0.8     1.144  0.7311  -2.5e-6  -1.5e-6
  30.e-6  9.e-6  0.025e-3    -4.0     0.861  0.878   -3.4e-6  -1.74e-6
  30.e-6  5.e-6  0.031e-3     0.6     1.5    0.72     0       -3.9e-6
  50.e-6  6.e-6  0.0414e-3   -3.8     0.34   0.8     -1.6e-6  -2.e-6       depletion
  50.e-6  5.e-6  0.03e-3      0.37    0.23   0.86    -1.6e-6  -2.e-6       enhancement
  50.e-6  6.e-6  0.038e-3    -0.9     0.23   0.707   -1.6e-6  -2.e-6       zero
  20.e-6  4.e-6  0.06776e-3   0.5409  0.065  0.71    -0.8e-6  -0.2e-6
  20.e-6  4.e-6  0.06505e-3   0.6209  0.065  0.71    -0.8e-6  -0.2e-6
  20.e-6  4.e-6  0.05365e-3   0.6909  0.03   0.8     -0.3e-6  -0.2e-6
  20.e-6  4.e-6  0.05365e-3   0.4909  0.03   0.8     -0.3e-6  -0.2e-6
  12.e-6  4.e-6  0.023e-3    -4.5     0.29   0.6      0        0           depletion
  60.e-6  3.e-6  0.022e-3     0.1     0.11   0.65     0        0           enhancement
  12.e-6  4.e-6  0.038e-3    -0.8     0.33   0.6      0        0           zero
  20.e-6  6.e-6  0.022e-3     0.8     1      0.66     0        0

References:

Spiro, H.: Simulation integrierter Schaltungen. R. Oldenbourg Verlag Muenchen Wien 1990.

Parameters

Name	Description
W	Width [m]
L	Length [m]
Beta	Transconductance parameter [A/V2]
Vt	Zero bias threshold voltage [V]
K2	Bulk threshold parameter
K5	Reduction of pinch-off region
dW	narrowing of channel [m]
dL	shortening of channel [m]
RDS	Drain-Source-Resistance [Ohm]
Tnom	Parameter measurement temperature [K]
kvt	fitting parameter for Vt
kk2	fitting parameter for K22
useHeatPort	=true, if HeatPort is enabled
T	Fixed device temperature if useHeatPort = false [K]

Connectors

Name	Description
D	Drain
G	Gate
S	Source
B	Bulk
heatPort

Modelica.Electrical.Analog.Semiconductors.HeatingPMOS

Information

The PMOS model is a simple model of a p-channel metal-oxide semiconductor FET. It differs slightly from the device used in the SPICE simulator. For more details please care for H. Spiro.
A heating port is added for thermal electric simulation. The heating port is defined in the Modelica.Thermal library.
The model does not consider capacitances. A high drain-source resistance RDS is included to avoid numerical difficulties.

References:

Spiro, H.: Simulation integrierter Schaltungen. R. Oldenbourg Verlag Muenchen Wien 1990.

Some typical parameter sets are:

  W       L      Beta        Vt    K2     K5      DW       DL
  m       m      A/V^2       V     -      -       m        m
  50.e-6  8.e-6  0.0085e-3  -0.15  0.41   0.839  -3.8e-6  -4.0e-6
  20.e-6  6.e-6  0.0105e-3  -1.0   0.41   0.839  -2.5e-6  -2.1e-6
  30.e-6  5.e-6  0.0059e-3  -0.3   0.98   1.01    0       -3.9e-6
  30.e-6  5.e-6  0.0152e-3  -0.69  0.104  1.1    -0.8e-6  -0.4e-6
  30.e-6  5.e-6  0.0163e-3  -0.69  0.104  1.1    -0.8e-6  -0.4e-6
  30.e-6  5.e-6  0.0182e-3  -0.69  0.086  1.06   -0.1e-6  -0.6e-6
  20.e-6  6.e-6  0.0074e-3  -1.    0.4    0.59    0        0

Parameters

Name	Description
W	Width [m]
L	Length [m]
Beta	Transconductance parameter [A/V2]
Vt	Zero bias threshold voltage [V]
K2	Bulk threshold parameter
K5	Reduction of pinch-off region
dW	Narrowing of channel [m]
dL	Shortening of channel [m]
RDS	Drain-Source-Resistance [Ohm]
Tnom	Parameter measurement temperature [K]
kvt	fitting parameter for Vt
kk2	fitting parameter for Kk2
useHeatPort	=true, if HeatPort is enabled
T	Fixed device temperature if useHeatPort = false [K]

Connectors

Name	Description
D	Drain
G	Gate
S	Source
B	Bulk
heatPort

Modelica.Electrical.Analog.Semiconductors.HeatingNPN

Information

This model is a simple model of a bipolar NPN junction transistor according to Ebers-Moll.
A heating port is added for thermal electric simulation. The heating port is defined in the Modelica.Thermal library.
A typical parameter set is (the parameter Vt is no longer used):

  Bf  Br  Is     Vak  Tauf    Taur  Ccs   Cje     Cjc     Phie  Me   PHic   Mc     Gbc    Gbe
  -   -   A      V    s       s     F     F       F       V     -    V      -      mS     mS
  50  0.1 1e-16  0.02 0.12e-9 5e-9  1e-12 0.4e-12 0.5e-12 0.8   0.4  0.8    0.333  1e-15  1e-15

References:

Vlach, J.; Singal, K.: Computer methods for circuit analysis and design. Van Nostrand Reinhold, New York 1983 on page 317 ff.

Parameters

Name	Description
Bf	Forward beta
Br	Reverse beta
Is	Transport saturation current [A]
Vak	Early voltage (inverse), 1/Volt [1/V]
Tauf	Ideal forward transit time [s]
Taur	Ideal reverse transit time [s]
Ccs	Collector-substrate(ground) cap. [F]
Cje	Base-emitter zero bias depletion cap. [F]
Cjc	Base-coll. zero bias depletion cap. [F]
Phie	Base-emitter diffusion voltage [V]
Me	Base-emitter gradation exponent
Phic	Base-collector diffusion voltage [V]
Mc	Base-collector gradation exponent
Gbc	Base-collector conductance [S]
Gbe	Base-emitter conductance [S]
EMin	if x < EMin, the exp(x) function is linearized
EMax	if x > EMax, the exp(x) function is linearized
Tnom	Parameter measurement temperature [K]
XTI	Temperature exponent for effect on Is
XTB	Forward and reverse beta temperature exponent
EG	Energy gap for temperature effect on Is
NF	Forward current emission coefficient
NR	Reverse current emission coefficient
K	Boltzmann's constant
q	Elementary electronic charge
useHeatPort	=true, if HeatPort is enabled
T	Fixed device temperature if useHeatPort = false [K]

Connectors

Name	Description
heatPort
C	Collector
B	Base
E	Emitter

Modelica.Electrical.Analog.Semiconductors.HeatingPNP

Information

This model is a simple model of a bipolar PNP junction transistor according to Ebers-Moll.
A heating port is added for thermal electric simulation. The heating port is defined in the Modelica.Thermal library.
A typical parameter set is (the parameter Vt is no longer used):

  Bf  Br  Is     Vak  Tauf    Taur  Ccs   Cje     Cjc     Phie  Me   PHic   Mc     Gbc    Gbe
  -   -   A      V    s       s     F     F       F       V     -    V      -      mS     mS
  50  0.1 1e-16  0.02 0.12e-9 5e-9  1e-12 0.4e-12 0.5e-12 0.8   0.4  0.8    0.333  1e-15  1e-15

References:

Vlach, J.; Singal, K.: Computer methods for circuit analysis and design. Van Nostrand Reinhold, New York 1983 on page 317 ff.

Parameters

Name	Description
Bf	Forward beta
Br	Reverse beta
Is	Transport saturation current [A]
Vak	Early voltage (inverse), 1/Volt [1/V]
Tauf	Ideal forward transit time [s]
Taur	Ideal reverse transit time [s]
Ccs	Collector-substrate(ground) cap. [F]
Cje	Base-emitter zero bias depletion cap. [F]
Cjc	Base-coll. zero bias depletion cap. [F]
Phie	Base-emitter diffusion voltage [V]
Me	Base-emitter gradation exponent
Phic	Base-collector diffusion voltage [V]
Mc	Base-collector gradation exponent
Gbc	Base-collector conductance [S]
Gbe	Base-emitter conductance [S]
EMin	if x < EMin, the exp(x) function is linearized
EMax	if x > EMax, the exp(x) function is linearized
Tnom	Parameter measurement temperature [K]
XTI	Temperature exponent for effect on Is
XTB	Forward and reverse beta temperature exponent
EG	Energy gap for temperature effect on Is
NF	Forward current emission coefficient
NR	Reverse current emission coefficient
K	Boltzmann's constant
q	Elementary electronic charge
useHeatPort	=true, if HeatPort is enabled
T	Fixed device temperature if useHeatPort = false [K]

Connectors

Name	Description
heatPort
C	Collector
B	Base
E	Emitter

Modelica.Electrical.Analog.Semiconductors.Thyristor

Information

This is a simple thyristor model with three pins: Anode, Cathode and Gate. There are three operating modes:conducting, blocking and reverse breakthrough.
As long as the thyristor is in blocking mode it behaves like a linear resistance Roff=VDRM^2/(VTM*IH). But if the voltage between anode and cathode exceeds VDRM or a positive gate current flows for a sufficient time the mode changes to conducting mode. The model stays in conducting mode until the anode current falls below the holding current IH. There is no way to switch off the thyristor via the gate. If the voltage between anode and cathode is negative, the model represents a diode (parameters Vt, Nbv) with reverse breakthrough voltage VRRM.

The dV/dt switch on is not taken into account in this model. The gate circuit is not influenced by the main circuit.

Parameters

Name	Description
VDRM	Forward breakthrough voltage [V]
VRRM	Reverse breakthrough voltage [V]
IDRM	Saturation current [A]
VTM	Conducting voltage [V]
IH	Holding current [A]
ITM	Conducting current [A]
VGT	Gate trigger voltage [V]
IGT	Gate trigger current [A]
TON	Switch on time [s]
TOFF	Switch off time [s]
Vt	Voltage equivalent of temperature (kT/qn) [V]
Nbv	Reverse Breakthrough emission coefficient
useHeatPort	=true, if HeatPort is enabled
T	Fixed device temperature if useHeatPort = false [K]

Connectors

Name	Description
heatPort
Anode
Cathode
Gate

Modelica.Electrical.Analog.Semiconductors.SimpleTriac

Information

This is a simple TRIAC model based on the extended thyristor model Modelica.Electrical.Analog.Semiconductors.Thyristor.
Two thyristors are contrarily connected in parallel, whereas each transistor is connected with a diode.
Further information regarding the electrical component TRIAC can be detected in documentation of the ideal TRIAC model.
As an additional information: this model is based on the Modelica.Electrical.Analog.Semiconductors.Thyristor.

Attention: The model seems to be very sensitive with respect to the choice of some parameters (e.g., VDRM, VRRM). This is caused by the thyristor model. Further investigations are necessary.

Parameters

Name	Description
VDRM	Forward breakthrough voltage [V]
VRRM	Reverse breakthrough voltage [V]
IDRM	Saturation current [A]
VTM	Conducting voltage [V]
IH	Holding current [A]
ITM	Conducting current [A]
VGT	Gate trigger voltage [V]
IGT	Gate trigger current [A]
TON	Switch on time [s]
TOFF	Switch off time [s]
Vt	Voltage equivalent of temperature (kT/qn) [V]
Nbv	Reverse Breakthrough emission coefficient
useHeatPort	=true, if HeatPort is enabled
T	Fixed device temperature if useHeatPort = false [K]

Connectors

Name	Description
n	Cathode
p	Anode
g	Gate
heatPort